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A roadmap to useful fault-tolerant quantum computing

Built for speed, scalability and real-world viability, enabled by advanced materials.
Handwritten physics and math notes with formulas, equations, and diagrams on lined paper.

Designed to scale in the real world

Fast qubit operations
C12’s carbon nanotube spin qubits support fast electronic gate operations without long qubit transport sequences or slow nearest-neighbor swap chains.
Fast gates

The theoretical speed limit for C12’s solid-state qubit is under 10 ns for physical single-qubit gates and under 100 ns for physical two-qubit gates.
Negligible atom or electron movement

C12’s two-qubit gates don’t rely on physical atom movement, which dramatically slows trapped ion and neutral atom systems, or the shuttling of electrons across long distances, which slows many spin qubit approaches.
All-to-all connectivity zones

C12’s quantum bus approach allows local all-to-all connectivity zones that support more efficient algorithms, quantum error correction codes, and gates that entangle many qubits at once.
Scalable architecture
C12 is built to compound across generations. Each system after Aïdôs is a modular unit that can be duplicated and integrated to create the next larger one.
Chiplet-based 3D architecture

C12 is able to leverage modern semiconductor fabrication and 3D integration to support a modular, scalable approach.
Efficient error correction

C12’s architecture supports efficient quantum error correction via code switching using transversal gates, but also supports more standard techniques such as magic state cultivation, remaining flexible for inevitable coming advances in error correction.
Connectivity and parallelization

The option to either entangle qubits within a nanotube, or with up to 400 qubits across a long-distance quantum bus, allows C12 to optimize the balance between connectivity and parallel operations.
Compact and deployable
Utility-scale quantum computing must remain energy-efficient and deployable. C12 targets sub-Watt power per qubit and 6000 qubits/m² within a single integrated system.
Reduced cooling requirement

Compared with superconducting qubits, C12’s spin qubits can be operated at temperatures an order of magnitude higher, which actually supports two orders of magnitude more cryoelectronics.
Small system footprint

More efficient control electronics and much smaller size than superconducting qubits allow C12 to target 100,000 physical qubits with only a single dilution refrigerator and a few server racks.
Helium-3 efficient

C12’s single-cryostat approach requires only a few tens of liters of Helium-3, unlike approaches that distribute processing over many dilution refrigerators and may require a significant fraction of the world’s Helium-3 reserves.
The material difference
Carbon nanotubes provide a near-ideal one-dimensional pathway for electrical signals, enabling uniform control, connectivity and reproducible scaling.
High fidelity

Carbon nanotube based qubits maximize fidelity by offering the best noise isolation of any solid-state qubit, especially from nuclear spin noise thanks to its purified carbon-12 isotope.
Uniform qubit control

Carbon nanotube based qubits can be tuned at a ms scale to match each other, rather than impose a huge burden of custom timing and microwave frequencies specific to every qubit for every gate.

The path to utility-scale quantum computing

2027
Logical Qubits
Physical Qubits
Logical
error rate
Watts per

physical qubit
Qubits per
square meter
2027
1
16
10⁻³
1500
1.4
2030
8
236
10⁻⁵
100
21
2032
128+
8500
10⁻⁶
6
500
2033
792+
100000
10⁻⁷
0.5
6000
2033
Logical error rate applies to single-qubit Clifford gates.
On-premise delivery within 12 months of first demonstration system.
2027
Logical Qubits
Physical Qubits
Logical
error rate
Watts per

physical qubit
Qubits per
square meter
Logical error rate applies to single-qubit Clifford gates.
On-premise delivery within 12 months of first demonstration system.
Making this roadmap possible
Explore the architecture and system design that make scaling, speed, and real-world viability possible
Aïdôs, the Greek goddess of humility. A single logical qubit, but unlike any before it.
First logical operations
Aïdôs marks C12’s introduction of foundational quantum error correction on a compact, next-generation solid-state architecture using spin qubits.
First logical operations
16 physical qubits
1 logical qubit
10⁻³ logical error rate
Universal physical gate set
Sub-μs gate speed
Long-distance resonator couplers
Cloud-accessible system
Aïdôs
2027
Zélos, the embodiment of ambition and pursuit of excellence, mirrors the drive to scale quantum systems with fidelity and control.
Modular architecture begins
Zélos introduces a chiplet-based architecture designed for replication and system-level scaling. This is when modular integration becomes central.
What it introduces
236 physical qubits
8 logical qubits
10-5 logical error rate
Modular chiplet packaging
Cryoelectronics
All-digital control signals
Qubit bias memory network
Zélos
2030
Styx
2032
Panopeia
2033
Styx, the goddess and river dividing life from death, represents the threshold to quantum advantage, when quantum hardware becomes truly resilient
Scaling through replication
Styx combines many Zélos chiplets via inter-chiplet coupling, significantly increasing logical performance while improving efficiency.
What it introduces
8,500 physical qubits
128+ logical qubits
10⁻⁶ logical error rate
Multi-chiplet module
Major increase in power efficiency per qubit
Chiplet-chiplet couplers
Panopeia, "she who sees everything", is the moment we reach universal quantum computing
Integrated utility-scale system
Panopeia combines Styx modules to complete the transition to an integrated, deployable quantum system capable of sustained logical computation.
What it introduces
100,000 physical qubits
792+ logical qubits
10⁻⁷ logical error rate
Multi-module platform
Cross-module couplers
Sub-Watt power per qubit at scale
High qubit count, still within a single cryostat
Aïdôs
2027
Zélos
2030
Styx
2032
Panopeia
2033
Aïdôs, the Greek goddess of humility. A single logical qubit, but unlike any before it.
Zélos, the embodiment of ambition and pursuit of excellence, mirrors the drive to scale quantum systems with fidelity and control.
Styx, the goddess and river dividing life from death, represents the threshold to quantum advantage, when quantum hardware becomes truly resilient
Panopeia, "she who sees everything", is the moment we reach universal quantum computing
First logical operations
Aïdôs marks C12’s introduction of foundational quantum error correction on a compact, next-generation solid-state architecture using spin qubits.
Modular architecture begins
Zélos introduces a chiplet-based architecture designed for replication and system-level scaling. This is when modular integration becomes central.
Scaling through replication
Styx combines many Zélos chiplets via inter-chiplet coupling, significantly increasing logical performance while improving efficiency.
Integrated utility-scale system
Panopeia combines Styx modules to complete the transition to an integrated, deployable quantum system capable of sustained logical computation.
What it introduces
16 physical qubits
1 logical qubit
10⁻³ logical error rate
Universal physical gate set
Sub-μs gate speed
Long-distance resonator couplers
Cloud-accessible system
What it introduces
236 physical qubits
8 logical qubits
10⁻⁵ logical error rate
Modular chiplet packaging
Cryoelectronics
All-digital control signals
Qubit bias memory network
What it introduces
8,500 physical qubits
128+ logical qubits
10⁻⁶ logical error rate
Multi-chiplet module
Chip-integrated amplifiers
Major increase in power efficiency per qubit
Dramatically increased qubit density
What it introduces
100,000 physical qubits
792+ logical qubits
10⁻⁷ logical error rate
Multi-module platform
Cross-module couplers
Sub-Watt power per qubit at scale
High qubit count, still within a single cryostat

Let’s explore what quantum can do for you